The present invention relates to a semiconductor technology and, for example, relates to a technology which is effectively applicable to a semiconductor device where a plurality of semiconductor chips are integrated into a single package.
Semiconductor devices having configuration where a plurality of semiconductor chips are integrated into a single package are disclosed, for example, in Japanese Unexamined Patent Application Publication No. 2015-8229 (Patent Document 1), U.S. Unexamined Patent Application Publication No. 2007/0052379 (Patent Document 2), Japanese Unexamined Patent Application Publication No. 2011-54800 (Patent Document 3), and Japanese Unexamined Patent Application Publication No. 2009-295959 (Patent Document 4).